1. Technical Field
The present invention relates to well isolation trenches (WIT), and more particularly, to well isolation trenches for CMOS (Complementary Metal Oxide Semiconductor) devices (for example SRAM-Static Random Access Memory).
2. Related Art
In a conventional CMOS device including an N channel and a P channel transistor, the N channel transistor is formed on a P well, and the P channel is formed on an N well. There is always a need for a well isolation trench structure (and a method for forming the same) that provides improved electrical properties of the CMOS device.